3D NAND hits four bits per cell

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“The implementation of X4 architecture on BiCS3 is a significant development for Western Digital as it demonstrates our continued leadership in NAND flash technology. It also enables us to offer an expanded choice of storage solutions for our customers,” said Dr Siva Sivaram, executive vice president, memory technology. “The most striking aspect in this announcement is the use of innovative techniques in the X4 architecture that allows our BiCS3 X4 to deliver performance attributes comparable to those in BiCS3 X3.

“The narrowing of the performance gap between the X4 and X3 architectures is an important and differentiating capability and should help drive broader market acceptance of X4 technology over the next several years.”

The company expects to deploy 3D NAND X4 technology across multiple applications and notes the forthcoming 96-layer BiCS4 device is also expected to feature X4 capabilities.